Fac/Staff profile

Anys
Bacha
Ph.D.

Assistant Professor, Computer and Information Science
Anys Bacha
238 CIS
4901 Evergreen Rd
Dearborn, MI 48128
Mondays 2:30pm - 4:30pm or by appointment

Teaching Areas:

Research Areas:

Biography and Education

Education

  • Ph.D., The Ohio State University

Teaching and Research

Courses Taught

Selected Publications

  1. K. Barber, A. Bacha, L. Zhou, Y. Zhang, R. Teodorescu, "SpecShield: Shielding Speculative Data from Leaky Side Channels", International Conference on Parallel Architectures and Compilation Techniques (PACT), 2019 (acceptance rate: 21%).
  2. K. Barber, A. Bacha, L. Zhou, Y. Zhang, R. Teodorescu, "Isolating Speculative Data to Prevent Transient Execution Attacks", IEEE Computer Architecture Letters (CAL), 2019 (acceptance rate: 24%)
  3. L. Zhou, M. Samavatian, A. Bacha, S. Majumdar, R. Teodorescu, "Adaptive Parallel Execution of Deep Neural Networks on Heterogeneous Edge Devices", ACM/IEEE Symposium on Edge Computing (SEC), 2019. 
  4. N. Lachtar, D. Ibdah, A. Bacha, "The Case for Native Instructions in the Detection of Mobile Ransomware", IEEE Letters of Computer Society (LOCS), 2019.
  5. Xiang Pan, Anys Bacha, Spencer Rudolph, Li Zhou, Yinqian Zhang, Radu Teodorescu, "NVCool: When Non-Volatile Caches Meet Cold Boot Attacks", IEEE International Conference on Computer Design (ICCD), 2018 (acceptance rate: 29%).
  6. Mohammad Hossein Samavatian, Anys Bacha, Li Zhou, Radu Teodorescu, "RNNFast: An Accelerator for Recurrent Neural Networks Using Domain Wall Memory", CoRR abs/1812.07609 (2018).
  7. X. Pan, A. Bacha, and R. Teodorescu, "Respin: Rethinking Near-Threshold Multiprocessor Design with Non-Volatile Memory", International Parallel and Distributed Processing Symposium, 2017 (acceptance rate: 22%).
  8. A. Bacha and R. Teodorescu, "Authenticache: Harnessing Cache ECC for System Authentication". IEEE International Symposium on Microarchitecture, 2015 (acceptance rate: 21%).
  9. A. Bacha and R. Teodorescu, "Using ECC Feedback to Guide Voltage Speculation in Low-Voltage Processors", IEEE International Symposium on Microarchitecture, 2014 (acceptance rate: 19%).
  10. A. Bacha and R. Teodorescu, "Dynamic Reduction of Voltage Margins by Leveraging On-chip ECC in Itanium II Processors", ACM International Symposium on Computer Architecture, 2013 (acceptance rate: 19%).

Awards and Recognition

  • 2020 CECS Faculty Excellence Award for Teaching
  • 2020 NSF Grant (Award #1947580)
  • 2019 Best of CAL Award
  • 2019 NSF Grant (Award #1933772)
  • 2019 U.S. Patent (10318431)
  • 2018 U.S. Patents (10109370, 9940291, 9965391)
  • 2016 IEEE Micro Top Picks Honorable Mention
  • 2016 The Ohio State University CSE Graduate Research Award
  • 2013-2016 U.S. Patents (9342123, 8347070, 7768756)
  • 2015 Hewlett-Packard Innovators of the Year
  • 2014-2015 Hewlett-Packard Gold Star Award
  • 2014-2015 Travel Grant, IEEE MICRO

History

Member for
2 years 11 months
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